Projects

International

SAFEMOST – Vysokobezpečný GaN MOS spínací tranzistor
Highly Safe GaN Metal-Oxide-Semiconductor Transistor Switch
Program: International Visegrad Found (IVF)
Project leader: Ing. Kuzmík Ján DrSc.
Project webpage: http://www.safemost.sav.sk/
Duration: 1.10.2015 – 30.3.2019
Príprava a charakterizácia pokročilých GaN nano-hetero-štruktur
Advanced GaN nano-hetero-structures – preparation and characterization
Program: Inter-academic agreement
Project leader: doc. Ing. Novák Jozef DrSc.
Duration: 1.1.2017 – 31.12.2017

National

Vertikálny GaN MOSFET pre výkonové spínacie aplikácie
Vertical GaN MOSFET for power switching applications
Program: SRDA
Project leader: Ing. Kuzmík Ján DrSc.
Annotation: Owing the ever growing demand for the energy volume, energy attainability represents one of the most important issues of today’s society. However, there are great reserves in the energy savings available. According to available analyses, more than 10% of all electricity is ultimately lost in the form of conversion losses. Clearly, even partial improvement in the conversion efficiency can have strong economic impact. As the most of energy is now used for the electronics, corresponding scale of the losses forms at the end-user side, where the electricity is converted into a form suitable for a particular appliance. The main effort towards the conversion efficiency improvements therefore targets the area of power AC/DC and DC/DC converters for consumer and industrial electronics. Significant improvement in the conversion efficiency can be achieved by using GaN based transistors, as they are capable to operate at much higher frequencies with almost three times lower switching losses compared to Si devices.The main goal of the project is the research and development of vertical GaN MOSFET without using p-doping, and gaining the original knowledge on electrical and physical properties of the developed devices. From the quantitative point of view, our proof-of-concept device will target RON<2 mOhm/cm2 and VBD>600 V. An original feature of the proposed concept is utilization of the semi-insulating (SI) GaN as a channel layer (instead of p-type GaN), which blocks the current flow through the transistor at zero gate voltage. To open the transistor channel, positive voltage applied to the gate will be needed to induce down bend-bending in the SI GaN, allowing electron injection from the source to the drift region (along the side walls of SI GaN). This concept therefore represents a unipolar enhancement-mode transistor, while drift region is formed of un-doped GaN with extremely low density of dislocation grown directly on GaN substrate.
Duration: 1.7.2019 – 30.6.2022
Opracovanie povrchu polovodiča ako cesta k novým III-As a III-N elektronickým súčiastkám
Surface processing of semiconductors as the way towards new III-As and III-N electronic devices
Program: VEGA
Project leader: RNDr. Gregušová Dagmar DrSc.
Annotation: Surfaces of III-V semiconductors exhibit large densisties of surface states that limit the use of the semicondutorsin electronics. Native oxides on III-V surfaces do not match the qualiy of oxides on the surface of silicon. Thesurface states have been studied and manipulated by many researchers with the aim to eliminate their infuence.Our aim is to find out how technology is used to eliminate or passivate the states. We intend to useheterostrucutres whose surface will be manipulated to allow for the preparation of high quality MOSHFETs.Manipulation with surface states leads to new types of device. It will thus be possible to integrate various types oftransistor on a single wafer. To explore properties of individual layers of heterostructure by optical measurementwill necessite their release from original substrates and transfer to host substrates. Procedures of heterostructurerelease and transfer will be used in the integration of other semiconductor devices on planar and non-planarsubstrates.
Duration: 1.1.2017 – 31.12.2020
SENAD – Polovodičové nanomembrány pre hybridné súčiastky
Semiconductor nanomembranes for hybrid devices
Program: SRDA
Project leader: Ing. Kúdela Róbert CSc.
Annotation: The project deals with GaAs and GaN-based nanomembranes, including their preparation, study of physical properties, application in new hybrid devices that cannot be effectively prepared with present monolithic technologies. A "GaAs-based (or GaN-based) nanomembrane" can be defined as a monocrystalline structure that was released from its original substrate, is either free-standing or bonded to a host substrate, and its thickness is up to hundreds nanometers and lateral dimensions are more than two orders magnitude larger. Thin organic films, which can modify properties of nanomembranes, will be deposited on some samples.
Duration: 1.7.2016 – 31.12.2019
MioGaN – GaN monolitické integrované obvody
GaN Monolithic Integrated Circuits
Program: SRDA
Project leader: Ing. Kuzmík Ján DrSc.
Duration: 1.7.2016 – 30.6.2019
Tranzistory s InN-kanálom pre THz mikrovlny a logiku
Transistors with InN channel for THz microwaves and logic
Program: SRDA
Project leader: Ing. Kuzmík Ján DrSc.
Duration: 1.7.2016 – 30.6.2019
Technológia hradiel s izolujúcou vrstvou pre kvalitné, vyskoúčinné III-As a III-N tranzistory
Insulated gate technologies for high-performance III-As and III-N transistors
Program: VEGA
Project leader: RNDr. Gregušová Dagmar DrSc.
Duration: 1.1.2013 – 31.12.2016
Kov-oxid-polovodič (MOS) štruktúry na III-V materiáloch
Metal-oxide-semiconductor structures on III-V semiconductors
Program: VEGA
Project leader: RNDr. Gregušová Dagmar DrSc.
Duration: 1.1.2009 – 31.12.2012
Vplyv dielektrickej pasivácie na vlastnosti AlGaN/GaN HEMT-ov
Influence of dielectric passivation on properties of AlGaN/GaN HEMTs
Program: VEGA
Project leader: RNDr. Gregušová Dagmar DrSc.
Duration: 1.1.2006 – 1.12.2008