Ing. Hudec Boris, PhD.

Šichman, P., Stoklas, R., Hasenöhrl, S., Gregušová, D., Ťapajna, M., Hudec, B., Haščík, Š., Hashizume, T., Chvála, A., Šatka, A., and Kuzmík, J.: Vertical GaN transistor with semi-insulating channel, Physica Status Solidi (a) 220 (2023) SI2200776.

1. Woo, K.: J. Phys.-Mater. 7 (2024) 022003.

Kundrata, I., Barr, M.K.S., Tymek, S., Döhler, D., Hudec, B., Brüner, P., Vanko, G., Precner, M., Yokosawa, T., Spiecker, E., Plakhotnyuk, M., Fröhlich, K., and Bachmann, J.: Additive manufacturing in atomic layer processing mode, Small Methods (2022) 2101546.

1. Chen, M.: DALTON Trans. 52 (2023) 10254.
2. Chen, Y.X.: NPJ 2D Mater. Appl. 8 (2024) 17.

Majumdar, S., Chen, Y., Hudec, B., Hou, T.H., and Suri, M.: Semi-empirical RC circuit model for non-filamentary Bi-layer OxRAM devices, IEEE Transactions on Electron Devices 67 (2020) 1348-1352. (Not IEE SAS)

#     1. Huan, C.: IEEE 3rd Inter. Conf. Electron. Technol. – ICET 2020, no. 9119574, pp. 639-643.

Chang, C.C., Huang, H.H., Hudec, B., Wu, M.H., Chang, C.C.,  Liu, P.T., and Hou, T.H.: Strong read and write interference induced by breakdown failure in crossbar arrays, IEEE Trans. on Electron Devices 67 (2020) 5497-5504. (Not IEE SAS)

1. Chen, Y.-C.: Micromachines 12 (2021) 50.
2. Chen, Y.C.: IEEE Trans. Electron Dev. 68 (2021) 4363.

Kingra, S.K., Parmar, V., Chang, C.C., Hudec, B., Hou, T.-H., and Suri, M.: SLIM: Simultaneous logic-in-memory computing exploiting bilayer analog OxRAM devices, Sci Rep. 10 (2020) 2567.(Not IEE SAS)

1. Ziegler, M.: Sci Rep. 10 (2020)‏ 11843.
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5. Zanotti, T.: J. Low Power Electron. Appl. 11 (2021) 29.
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7. Fu, C.: Electronics 10 (2021) 2358.
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10. Liu, B.: ACS Applied Mater. Interfac. 13 (2021) 15391.
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13. Lalrinkima : Phys. Rev. B 107 (2023) 155305.
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Hudec, B., Chang, C.-C., Wang, I-T., Fröhlich, K., and Hou, T.-H.: Three-dimensional integration of ReRAMs. In Proc. IEEE Conf. Nanotechnol. (2019) 8626351.

1. Xu, W.: Inter. Conf. ASIC 2019.

Hudec, B., Chang, C.-C., Wang, I-T., Fröhlich, K., and Hou, T.-H.: Three-dimensional integration of ReRAMs. In IEEE Nano 2018. Cork 2018.  Proc. IEEE Conf. Nanotechnol. (2019) 8626351.(Not IEE SAS)

1. Xu, W.: Inter. Conf. ASIC ‏2019.

Lanza, M., Wong, H.S.P., Pop, E., Ielmini, D., Strukov, D., Regan, B.C., Larcher, L., Villena, M.A., Yang, J.J., Goux, L., Belmonte, A., Yang, Y.C., Puglisi, F.M., Kang, J.F.,  Magyari-Kope, B., Yalon, E., Kenyon, A., Buckwell, M., Mehonic, A., Shluger, A., Li, H.T., Hou, T.H., Hudec, B., Akinwande, D., Ge, R.J., Ambrogio, S., Roldan, J.B., Miranda, E., Sune, J., Pey, K.L., Wu, X., Raghavan, N., Wu, E., Lu, W.D., Navarro, G., Zhang, W.D., Wu, H.Q., Li, R.W., Holleitner, A., Wurstbauer, U., Lemme, M.C., Liu, M., Long, S.B., Liu, Q., Lv, H.B., Padovani, A., Pavan, P., Valov, I., Jing, X., Han, T.T., Zhu, K.C., Chen, S.C., Hui, F., and Shi, Y.Y.: Recommended methods to study resistive switching devices, Adv. Electron. Mater. 5 (2019) 1800143.(Not IEE SAS)

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